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Micrel, Inc.
F
Figure 11. Typical Converter Power Stage
Figure 12. Typical Layout of a Synchronous Buck Converter Power Stage
MIC4102
1. The circuit is configured as a synchronous buck
LO is routed over the ground plane which
power stage.
The high-side MOSFET drain
minimizes the impedance of that current path.
connects to the input supply voltage (drain) and
the source connects to the switching node. The
The decoupling capacitors, C B and C VDD are
placed to minimize etch length between the
low-side
MOSFET
drain
connects
to the
capacitors and their respective pins. This close
switching node and its source is connected to
ground. The buck converter output inductor (not
shown) would connect to the switching node.
The high-side drive trace, HO, is routed on top
placement is necessary to efficiently charge
capacitor C B when the HS node is low. All
traces are 0.025” wide or greater to reduce
impedance. Cin is used to decouple the high
of its return trace, HS, to minimize loop area and
current
path through
the MOSFETs.
parasitic inductance. The low-side drive trace,
November 2006
16
M9999-112806
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